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general description the max1909/max8725 highly integrated control ics simplify construction of accurate and efficient multi- chemistry battery chargers. the max1909/max8725 use analog inputs to control charge current and volt- age, and can be programmed by a host microcontroller (?) or hardwired. high efficiency is achieved through use of buck topology with synchronous rectification. the maximum current drawn from the ac adapter is pro- grammable to avoid overloading the ac adapter when supplying the load and the battery charger simultane- ously. the max1909/max8725 provide a digital output that indicates the presence of an ac adapter, and an analog output that monitors the current drawn from the ac adapter. based on the presence or absence of the ac adapter, the max1909/max8725 automatically select the appropriate source for supplying power to the sys- tem by controlling two external p-channel mosfets. under system control, the max1909/max8725 allow the battery to undergo a relearning or conditioning cycle in which the battery is completely discharged through the system load and then recharged. the max1909 includes a conditioning charge feature while the max8725 does not. the max1909/max8725 are available in space-saving 28-pin, 5mm 5mm thin qfn packages and operate over the extended -40? to +85? temperature range. the max1909/max8725 are now available in lead-free packages. applications notebook and subnotebook computers hand-held data terminals features ?.5% accurate charge voltage (0 c to +85 c) ?% accurate input current limiting ?% accurate charge current programmable charge current >4a automatic system power-source selection analog inputs control charge current and charge voltage monitor outputs for current drawn from ac input source ac adapter presence up to 17.65v (max) battery voltage maximum 28v input voltage greater than 95% efficiency charge any battery chemistry: li+, nicd, nimh, lead acid, etc. max1909/max8725 multichemistry battery chargers with automatic system power selector ________________________________________________________________ maxim integrated products 1 ordering information 19-2805; rev 2; 9/04 for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. evaluation kit available part temp range pin-package max1909 eti -40 c to +85 c 28 thin qfn max1909eti+ -40 c to +85 c 28 thin qfn max8725 eti -40 c to +85 c 28 thin qfn max8725eti+ -40 c to +85 c 28 thin qfn 28 27 26 25 24 23 22 8 9 10 11 12 13 14 15 16 17 18 19 20 21 7 6 5 4 3 2 1 max1909 max8725 thin qfn top view ldo dcin acin ref gnd/pkpres acok mode pdl pds cssp cssn src dhi dhiv dlov dlo pgnd csip csin batt gnd ccs ccv cci vctl ictl cls iinp pin configuration cssp cssn ldo dhi dlov dlo pgnd csip csin batt gnd dcin vctl ictl mode acin acok cls ccv cci ccs ref ldo ac adapter: input p3 0.01 10 h n1 p1 0.015 to external load ldo pds pdl src ldo ref iinp iinp dhiv src p2 max1909 max8725 pkpres max8725 only minimum operating circuit + denotes lead-free package.
max1909/max8725 multichemistry battery chargers with automatic system power selector 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics (circuit of figure 1, v dcin = v cssp = v cssn = 18v, v batt = v csip = v csin = 12v, v vctl = v ictl = 1.8v, mode = float, acin = 0, cls = ref, gnd = pgnd = 0, pkpres = gnd, ldo = dlov, t a = 0? to +85? , unless otherwise noted. typical values are at t a = +25?.) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. dcin, cssp, cssn, src, acok to gnd..............-0.3v to +30v dhiv ........................................................?rc + 0.3, src - 6v dhi, pdl, pds to gnd ...............................-0.3v to (v src + 0.3) batt, csip, csin to gnd .....................................-0.3v to +20v csip to csin or cssp to cssn or pgnd to gnd ...-0.3v to +0.3v cci, ccs, ccv, dlo, iinp, ref, acin to gnd ........................................-0.3v to (v ldo + 0.3v) dlov, vctl, ictl, mode, cls, ldo, pkpres to gnd ...................................................-0.3v to +6v dlov to ldo.........................................................-0.3v to +0.3v dlo to pgnd ..........................................-0.3v to (dlov + 0.3v) ldo short-circuit current...................................................50ma continuous power dissipation (t a = +70?) 28-pin tqfn (derate 20.8mw/? above +70?) .......1666mw operating temperature range ...........................-40? to +85? junction temperature ......................................................+150? storage temperature range .............................-60? to +150? lead temperature (soldering, 10s) .................................+300? parameter symbol conditions min typ max units charge voltage regulation vctl range 0 3.6 v v vctl = 3.6v (3 or 4 cells); not including vctl resistor tolerances -0.8 +0.8 v vctl = 3.6v/20 (3 or 4 cells); not including vctl resistor tolerances -0.8 +0.8 v vctl = 3.6v (3 or 4 cells); including vctl resistor tolerances of 1% -1.0 +1.0 battery regulation voltage accuracy v vctl = v ldo (3 or 4 cells, default threshold of 4.2v/cell) -0.5 +0.5 % v vctl default threshold v vctl rising 4.1 4.3 v v vctl = 3v 0 2.5 vctl input bias current v dcin = 0, v vctl = 5v 0 12 ? charge-current regulation max1909 0 3.6 ictl range max8725 0 3.2 v csip-to-csin full-scale current- sense voltage 69.37 75.00 80.63 mv max1909: v ictl = 3.6v (not including ictl resistor tolerances) -7.5 +7.5 max8725: v ictl = 3.2v (not including ictl resistor tolerances) -5 +5 max1909: v ictl = 3.6v x 0.5, max8725: v ictl = 3.2v x 0.5 (not including ictl resistor tolerances) -5 +5 max1909: v ictl = 0.9v (not including ictl resistor tolerances) -7.5 +7.5 charge-current accuracy max8725: v ictl = 0.18v (not including ictl resistor tolerances) -30 +30 %
max1909/max8725 multichemistry battery chargers with automatic system power selector _______________________________________________________________________________________ 3 electrical characteristics (continued) (circuit of figure 1, v dcin = v cssp = v cssn = 18v, v batt = v csip = v csin = 12v, v vctl = v ictl = 1.8v, mode = float, acin = 0, cls = ref, gnd = pgnd = 0, pkpres = gnd, ldo = dlov, t a = 0? to +85? , unless otherwise noted. typical values are at t a = +25?.) parameter symbol conditions min typ max units max1909: v ictl = 3.6v x 0.5, max8725: v ictl = 3.2v x 0.5 (including ictl resistor tolerances of 1%) -7.0 +7.0 charge-current accuracy v ictl = v ldo (default threshold of 45mv) -5 +5 % v ictl default threshold v ictl rising 4.1 4.2 4.3 v batt/csip/csin input voltage range 0 19 v charging enabled 350 650 csip/csin input current charging disabled; v dcin = 0 or v ictl = 0 0.1 1 ? max1909 0.75 ictl power-down mode threshold voltage max8725 0.06 v max1909 0.85 ictl power-up mode threshold voltage max8725 0.11 v v ictl = 3v -1 +1 ictl input bias current v dcin = 0v, v ictl = 5v -1 +1 ? input current regulation cssp-to-cssn full-scale current-sense voltage 72.75 75.00 77.25 mv v cls = ref -3 +3 v cls = ref x 0.75 -3 +3 input current-limit accuracy v cls = ref x 0.5 -4 +4 % c s s p /c s s n inp ut v ol tag e rang e 8.0 28 v v cssp = v cssn = v dcin > 8.0v 450 730 cssp/cssn input current v dcin = 0 0.1 1 ? cls input range 1.6 ref v cls input bias current v cls = 2.0v -1 +1 ? iinp transconductance v cssp - v cssn = 56mv 2.7 3.0 3.3 ma/v v cssp - v cssn = 75mv, terminated with 10k -7.5 +7.5 v cssp - v cssn = 56mv, terminated with 10k -5 +5 iinp accuracy v cssp - v cssn = 20mv, terminated with 10k -10 +10 % iinp output current v cssp - v cssn = 150mv, v iinp = 0v 350 ? iinp output voltage v cssp - v cssn = 150mv, v iinp = float 3.5 v
max1909/max8725 multichemistry battery chargers with automatic system power selector 4 _______________________________________________________________________________________ electrical characteristics (continued) (circuit of figure 1, v dcin = v cssp = v cssn = 18v, v batt = v csip = v csin = 12v, v vctl = v ictl = 1.8v, mode = float, acin = 0, cls = ref, gnd = pgnd = 0, pkpres = gnd, ldo = dlov, t a = 0? to +85? , unless otherwise noted. typical values are at t a = +25?.) parameter symbol conditions min typ max units supply and linear regulator dcin input voltage range v dcin 8.0 28 v dcin falling 7 7.4 dcin undervoltage-lockout trip point dcin rising 7.5 7.85 v dcin quiescent current i dcin 8.0v < v dcin < 28v 2.7 6 ma v batt = 19v, v dcin = 0v, or ictl = 0v 0.1 1 v batt = 16.8v, v dcin = 19v, ictl = 0v 0.1 1 batt input current i batt v batt = 2v to 19v, v dcin > v batt + 0.3v 200 500 ? ldo output voltage 8.0v < v dcin < 28v, no load 5.25 5.4 5.55 v ldo load regulation 0 < i ldo < 10ma 80 115 mv ldo undervoltage-lockout trip point v dcin = 8.0v 3.20 4 5.15 v reference ref output voltage ref 0 < i ref < 500? 4.2023 4.2235 4.2447 v ref undervoltage-lockout trip point ref falling 3.1 3.9 v trip points batt power_fail threshold v dcin - v batt , v dcin falling 50 100 150 mv batt power_fail threshold hysteresis 100 200 300 mv acin threshold acin rising 2.007 2.048 2.089 v acin threshold hysteresis 10 20 30 mv acin input bias current v acin = 2.048v -1 +1 ? switching regulator dhi off-time v b at t = 16.0v , v d c i n = 19v , v m od e = 3.6v 360 400 440 ns dhi minimum off-time v b at t = 16.0v , v d c i n = 17v , v m od e = 3.6v 260 300 350 ns dlov supply current i dlov dlo low 5 10 ? sense voltage for minimum discontinuous mode ripple current 7.5 mv cycle-by-cycle current-limit sense voltage 97 mv sense voltage for battery undervoltage charge current max1909 only, batt = 3.0v per cell 3 4.5 6 mv max1909 only, mode = float (3 cell), v batt rising 9.18 9.42 battery undervoltage threshold max1909 only, mode = ldo (4 cell), v batt rising 12.235 12.565 v dhiv output voltage with respect to src -4.5 -5.0 -5.5 v
max1909/max8725 multichemistry battery chargers with automatic system power selector _______________________________________________________________________________________ 5 electrical characteristics (continued) (circuit of figure 1, v dcin = v cssp = v cssn = 18v, v batt = v csip = v csin = 12v, v vctl = v ictl = 1.8v, mode = float, acin = 0, cls = ref, gnd = pgnd = 0, pkpres = gnd, ldo = dlov, t a = 0? to +85? , unless otherwise noted. typical values are at t a = +25?.) parameter symbol conditions min typ max units dhiv sink current 10 ma dhi on-resistance low dhi = v dhiv , i dhi = -10ma 2 5 dhi on-resistance high dhi = v cssn , i dhi = 10ma 2 4 dlo on-resistance high v dlov = 4.5v, i dlo = +100ma 3 7 dlo on-resistance low v dlov = 4.5v, i dlo = -100ma 1 3 error amplifiers v c tl = 3.6, v batt = 16.8v , m od e = ld o 0.0625 0.125 0.2500 gmv loop transconductance v c tl = 3.6, v batt = 12.6v , m od e = float 0.0833 0.167 0.3330 ma/v gmi loop transconductance max1909: ictl = 3.6v, max8725: v ictl = 3.2v, v cssp - v csin = 75mv 0.5 1 2 ma/v gms loop transconductance v cls = 2.048v, v cssp - v cssn = 75mv 0.5 1 2 ma/v cci/ccs/ccv clamp voltage 0.25v < v ccv < 2.0v, 0.25v < v cci < 2.0v, 0.25v < v ccs < 2.0v 150 300 600 mv logic levels mode input low voltage 0.8 v mode input middle voltage 1.6 1.8 2.0 v mode input high voltage 2.8 v mode input bias current mode = 0v or 3.6v -2 +2 ? acok and pkpres acok input voltage range 0 28 v acok sink current v acok = 0.4v, acin = 1.5v 1 ma acok leakage current v acok = 28v, acin = 2.5v 1 ? pkpres input voltage range 0 ldo v pkpres input bias current -1 +1 ? pkpres battery removal detect threshold max8725, pkpres rising 55 % of ldo pkpres hysteresis max8725 1 % pds, pdl switch control pds switch turn-off threshold v dcin - v batt , v dcin falling 50 100 150 mv pds switch threshold hysteresis v dcin - v batt 100 200 300 mv pds output low voltage, pds below src i pds = 0a 8 10 12 v pds turn-on current pds = src 6 12 ma pds turn-off current v pds = v src - 2v, v dcin = 16v 10 50 ma pdl switch turn-on threshold v dcin - v batt , v dcin falling 50 100 150 mv pdl switch threshold hysteresis v dcin - v batt 100 200 300 mv
max1909/max8725 multichemistry battery chargers with automatic system power selector 6 _______________________________________________________________________________________ electrical characteristics (circuit of figure 1, v dcin = v cssp = v cssn = 18v, v batt = v csip = v csin = 12v, v vctl = v ictl = 1.8v, mode = float, acin = 0, cls = ref, gnd = pgnd = 0, pkpres = gnd, ldo = dlov, t a = -40? to +85? , unless otherwise noted.) parameter symbol conditions min typ max units charge voltage regulation vctl range 0 3.6 v v vctl = 3.6v (3 or 4 cells); not including vctl resistor tolerances -0.8 +0.8 v vctl = 3.6v/20 (3 or 4 cells); not including vctl resistor tolerances -0.8 +0.8 v vctl = 3.6v (3 or 4 cells); including vctl resistor tolerances of 1% -1.0 +1.0 battery regulation voltage accuracy v vctl = v ldo (3 or 4 cells, default threshold of 4.2v/cell) -0.8 +0.8 % v vctl default threshold v vctl rising 4.1 4.3 v v vctl = 3v 0 2.5 vctl input bias current v dcin = 0v, v vctl = 5v 0 12 ? charge-current regulation max1909 0 3.6 ictl range max8725 0 3.2 v csip-to-csin full-scale current- sense voltage 69.37 80.63 mv max1909: v ictl = 3.6v (not including ictl resistor tolerances) -7.5 +7.5 max8725: v ictl = 3.2v (not including ictl resistor tolerances) -5 +5 max1909: v ictl = 3.6v x 0.5, max8725: v ictl = 3.2v x 0.5 (not including ictl resistor tolerances) -5 +5 max1909: v ictl = 0.9v (not including ictl resistor tolerances) -7.5 +7.5 charge-current accuracy max8725: v ictl = 0.18v (not including ictl resistor tolerances) -30 +30 % electrical characteristics (continued) (circuit of figure 1, v dcin = v cssp = v cssn = 18v, v batt = v csip = v csin = 12v, v vctl = v ictl = 1.8v, mode = float, acin = 0, cls = ref, gnd = pgnd = 0, pkpres = gnd, ldo = dlov, t a = 0? to +85? , unless otherwise noted. typical values are at t a = +25?.) parameter symbol conditions min typ max units pdl turn-on resistance pdl = gnd 50 100 150 k pdl turn-off current v src - v pdl = 1.5v 6 12 ma src = 19v, dcin = 0v 1 src input bias current src = 19, v batt = 16v 450 1000 ? delay time between pdl and pds transitions 2.5 5 7.5 ?
max1909/max8725 multichemistry battery chargers with automatic system power selector _______________________________________________________________________________________ 7 electrical characteristics (continued) (circuit of figure 1, v dcin = v cssp = v cssn = 18v, v batt = v csip = v csin = 12v, v vctl = v ictl = 1.8v, mode = float, acin = 0, cls = ref, gnd = pgnd = 0, pkpres = gnd, ldo = dlov, t a = -40? to +85? , unless otherwise noted.) parameter symbol conditions min typ max units max1909: v ictl = 3.6v x 0.5, max8725: v ictl = 3.2v x 0.5 (including ictl resistor tolerances of 1%) -7.0 +7.0 charge-current accuracy v ictl = v ldo (default threshold of 45mv) -5 +5 % v ictl default threshold v ictl rising 4.3 v batt/csip/csin input voltage range 0 19 v csip/csin input current charging enabled 650 ? max1909 0.75 ictl power-down mode threshold voltage max8725 0.06 v max1909 0.85 ictl power-up mode threshold voltage max8725 0.11 v input current regulation cssp-to-cssn full-scale current-sense voltage 72.75 77.25 mv v cls = ref -3 +3 v cls = ref x 0.75 -3 +3 input current-limit accuracy v cls = ref x 0.5 -4 +4 % cssp/cssn input voltage range 8.0 28 v cssp/cssn input current v cssp = v cssn = v dcin > 8.0v 730 ? cls input range 1.6 ref v iinp transconductance v cssp - v cssn = 56mv 2.7 3.3 ma/v v cssp - v cssn = 75mv, terminated with 10k -7.5 +7.5 v cssp - v cssn = 56mv, terminated with 10k -5 +5 iinp accuracy v cssp - v cssn = 20mv, terminated with 10k -10 +10 % iinp output current v cssp - v cssn = 150mv, v iinp = 0v 350 ? iinp output voltage v cssp - v cssn = 150mv, v iinp = float 3.5 v supply and linear regulator dcin input voltage range v dcin 8.0 28 v dcin falling 7 d c in u nd er vol tag e- lockout tr i p p oi nt dcin rising 7.85 v dcin quiescent current i dcin 8.0v < v dcin < 28v 6 ma batt input current i batt v batt = 2v to 19v, v dcin > v batt + 0.3v 500 ? ldo output voltage 8.0v < v dcin < 28v, no load 5.25 5.55 v ldo load regulation 0 < i ldo < 10ma 115 mv
max1909/max8725 multichemistry battery chargers with automatic system power selector 8 _______________________________________________________________________________________ electrical characteristics (continued) (circuit of figure 1, v dcin = v cssp = v cssn = 18v, v batt = v csip = v csin = 12v, v vctl = v ictl = 1.8v, mode = float, acin = 0, cls = ref, gnd = pgnd = 0, pkpres = gnd, ldo = dlov, t a = -40? to +85? , unless otherwise noted.) parameter symbol conditions min typ max units ldo undervoltage-lockout trip point v dcin = 8.0v 3.20 5.15 v reference ref output voltage ref 0 < i ref < 500? 4.1960 4.2520 v ref undervoltage-lockout trip point ref falling 3.9 v trip points batt power_fail threshold v dcin - v batt , v dcin falling 50 150 mv batt power_fail threshold hysteresis 100 300 mv acin threshold acin rising 2.007 2.089 v acin threshold hysteresis 10 30 mv switching regulator dhi off-time v batt = 16.0v, v dcin = 19v, v mode = 3.6v 360 440 ns dhi minimum off-time v batt = 16.0v, v dcin = 17v, v mode = 3.6v 260 350 ns dlov supply current i dlov dlo low 10 ? sense voltage for battery undervoltage charge current max1909 only, batt = 3.0v per cell 3 6 mv max1909 only, mode = float (3 cell), v batt rising 9.18 9.42 battery undervoltage threshold max1909 only, mode = ldo (4 cell), v batt rising 12.235 12.565 v dhiv output voltage with respect to src -4.5 -5.5 v dhiv sink current 10 ma dhi on-resistance low dhi = v dhiv , i dhi = -10ma 5 dhi on-resistance high dhi = v cssn , i dhi = 10ma 4 dlo on-resistance high v dlov = 4.5v, i dlo = +100ma 7 dlo on-resistance low v dlov = 4.5v, i dlo = -100ma 3 error amplifiers v c tl = 3.6, v batt = 16.8v , m od e = ld o 0.0625 0.2500 gmv loop transconductance v c tl = 3.6, v batt = 12.6v , m od e = float 0.0833 0.3330 ma/v gmi loop transconductance max1909: ictl = 3.6v, max8725: v ictl = 3.2v, v cssp - v csin = 75mv 0.5 2.0 ma/v gms loop transconductance v cls = 2.048v, v cssp - v cssn = 75mv 0.5 2.0 ma/v cci/ccs/ccv clamp voltage 0.25v < v ccv < 2.0v, 0.25v < v cci < 2.0v, 0.25v < v ccs < 2.0v 150 600 mv logic levels mode input low voltage 0.8 v mode input middle voltage 1.6 2.0 v
max1909/max8725 multichemistry battery chargers with automatic system power selector _______________________________________________________________________________________ 9 electrical characteristics (continued) (circuit of figure 1, v dcin = v cssp = v cssn = 18v, v batt = v csip = v csin = 12v, v vctl = v ictl = 1.8v, mode = float, acin = 0, cls = ref, gnd = pgnd = 0, pkpres = gnd, ldo = dlov, t a = -40? to +85? , unless otherwise noted.) parameter symbol conditions min typ max units mode input high voltage 2.8 v acok and pkpres acok input voltage range 0 28 v acok sink current v acok = 0.4v, acin = 1.5v 1 ma pkpres input voltage range 0 ldo v pkpres battery removal detect threshold max8725, pkpres rising 55 % of ldo pds, pdl switch control pds switch turn-off threshold v dcin - v batt , v dcin falling 50 150 mv p d s s w i tch thr eshol d h yster esi s v dcin - v batt 100 300 mv pds output low voltage, pds below src i pds = 0a 8 12 v pds turn-on current pds = src 6 ma pds turn-off current v pds = v src - 2v, v dcin = 16v 10 ma pdl switch turn-on threshold v dcin - v batt , v dcin falling 50 150 mv p d l s w i tch thr eshol d h yster esi s v dcin - v batt 100 300 mv pdl turn-on resistance pdl = gnd 50 150 k pdl turn-off current v src - v pdl = 1.5v 6 ma src input bias current src = 19, v batt = 16v 1000 ? note 1: guaranteed by design. not production tested. battery insertion and removal response max1909/max8725 toc01 500 s/div 1v 0v 2v 3v 16v 17v 0a 0a i in i batt v batt v cci , v ccv 5a/div 5a/div v cci v ccv v ccv v ccv v cci v cci system load-transient response max1909/max8725 toc02 100 s/div 1v 0v 2v 3v 5a 5a 0a 5a 0a 0a i batt i in i systemload v ccs v cci ccs cci typical operating characteristics (circuit of figure 2, v dcin = 20v, charge current = 3a, 4 li+ series cells, t a = +25?, unless otherwise noted.)
max1909/max8725 multichemistry battery chargers with automatic system power selector 10 ______________________________________________________________________________________ ldo load regulation max1909/max8725 toc04 ldo current (ma) ldo output error (%) 9 8 7 6 5 4 3 2 1 -1.2 -1.0 -0.8 -0.6 -0.4 -0.2 0 -1.4 010 line-transient response max1909/max8725 toc03 500 s/div 1.8v v batt ac-coupled 200mv/div inductor current 200ma/div 1.6v 3a 20v 30v v dcin v ccv ref vs. temperature max1909/max8725 toc07 temperature ( c) ref output error (%) 60 35 10 -15 -0.15 -0.10 -0.05 0 0.05 0.10 -0.20 -40 85 efficiency vs. charge current max1909/max8725 toc08 charge current (a) efficiency (%) 2.5 2.0 1.5 1.0 0.5 82 84 86 88 90 92 94 96 98 100 80 03.0 4 cells 3 cells ldo line regulation max1909/max8725 toc05 input voltage (v) ldo output error (%) 20 10 -0.05 0 0.05 0.10 -0.10 030 ref load regulation max1909/max8725 toc06 ref current ( a) ref output error (%) 800 600 400 200 -0.12 -0.10 -0.08 -0.06 -0.04 -0.02 0 -0.14 0 1000 typical operating characteristics (continued) (circuit of figure 2, v dcin = 20v, charge current = 3a, 4 li+ series cells, t a = +25?, unless otherwise noted.)
max1909/max8725 multichemistry battery chargers with automatic system power selector ______________________________________________________________________________________ 11 switching frequency vs. v in - v batt max1909/max8725 toc09 v in - v batt (v) switching frequency (khz) 8 6 4 2 50 100 150 200 250 300 350 400 450 500 0 010 iinp error vs. input current max1909/max8725 toc10 input current (a) iinp (%) 3.0 2.5 0.5 1.0 1.5 2.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 0 03.5 charger disabled -3 -1 -2 1 0 2 3 1.5 2.5 2.0 3.0 3.5 input current-limit accuracy vs. v cls max1909/max8725 toc14 v cls (v) input current-limit accuracy (%) -8 -4 -6 2 0 -2 6 4 8 1.5 3.0 3.5 2.0 2.5 4.0 4.5 5.0 5.5 6.0 iinp accuracy vs. input current max1909/max8725 toc11 input current (a) iinp accuracy (%) -2 0 -1 2 1 3 4 0.5 1.5 1.0 2.0 2.5 3.0 input current-limit accuracy vs. system load max1909/max8725 toc12 system load (a) input current-limit accuracy (%) v batt = 10v v batt = 13v v batt = 12v v batt = 16v i charge = 3a max1909 only typical operating characteristics (continued) (circuit of figure 2, v dcin = 20v, charge current = 3a, 4 li+ series cells, t a = +25?, unless otherwise noted.) input current-limit accuracy vs. system load max1909/max8725 toc13 system load (a) input current-limit accuracy (%) 3.0 2.5 0.5 1.0 1.5 2.0 -1 0 1 2 3 4 -2 03.5 v batt = 16v v batt = 12v v batt = 13v v batt = 10v
max1909/max8725 multichemistry battery chargers with automatic system power selector 12 ______________________________________________________________________________________ typical operating characteristics (continued) (circuit of figure 2, v dcin = 20v, charge current = 3a, 4 li+ series cells, t a = +25?, unless otherwise noted.) pdl-pds switching, ac adapter insertion max1909/max8725 toc15 100 s/div 10v 20v 10v 20v 10v 20v 0v v walladapter v systemload , v pds v pds v pdl , v batt v pdl system load v pdl v pds pds-pdl switchover, wall adapter removal max1909/max8725 toc16 500 s/div 10v 20v 0v 10v 20v 10v 20v 0v v walladapter v systemload v systemload v pds v pdl v batt v pdl pds-pdl switchover, battery insertion max1909/max8725 toc17 50 s/div 10v 15v 0v 5v 10v 15v 20v 5v 0v v system v pds v pdl v batt v pkdet conditioning mode wall adapter = 18v v pkpres pdl-pds switching, battery removal max1909/max8725 toc18 10 s/div 10v 15v 0v 5v 10v 15v 20v 5v 0v v system v pds v pdl v batt conditioning mode wall adapter = 18v v pkpres max8725 only
max1909/max8725 pin description pin name function 1 dcin dc supply voltage input. bypass dcin with a 1f capacitor to power ground. 2 ldo device power supply. output of the 5.4v linear regulator supplied from dcin. bypass with a 1f capacitor. 3 acin ac detect input. this uncommitted comparator input can be used to detect the presence of the chargers power source. the comparators open-drain output is the acok signal. 4 ref 4.2235v voltage reference. bypass with a 1f capacitor to gnd. gnd max1909: ground this pin. 5 pkpres max8725: pull pkpres high to disable charging. used for detecting presence of battery pack. 6 acok ac detect output. high-voltage open-drain output is high impedance when acin is greater than 2.048v. the acok output remains a high impedance when the max1909/max8725 are powered down. 7 mode trilevel input for setting number of cells and asserting the conditioning mode: mode = gnd; asserts conditioning mode. mode = float; charge with 3 times the cell voltage programmed at vctl. mode = ldo; charge with 4 times the cell voltage programmed at vctl. 8 iinp input current monitor output. the current delivered at the iinp output is a scaled-down replica of the system load current plus the input-referred charge current sensed across cssp and cssn inputs. the transconductance of (cssp - cssn) to iinp is 3ma/v. 9 cls source current-limit input. voltage input for setting the current limit of the input source. 10 ictl input for setting maximum output current 11 vctl input for setting maximum output voltage 12 cci output current-regulation loop-compensation point. connect 0.01f to gnd. 13 ccv voltage-regulation loop-compensation point. connect 10k in series with 0.1f to gnd. 14 ccs input current-regulation loop-compensation point. use 0.01f to gnd. 15 gnd analog ground 16 batt battery voltage feedback input 17 csin output current-sense negative input 18 csip output current-sense positive input. connect a current-sense resistor from csip to csin. 19 pgnd power ground 20 dlo low-side power-mosfet driver output. connect to low-side nmos gate. when the max1909/max8725 are shut down, the dlo output is low. 21 dlov low-side driver supply. bypass with a 1f capacitor to ground. 22 dhiv high-side driver supply. bypass with a 0.1f capacitor to src. 23 dhi high-side power-mosfet driver output. connect to high-side pmos gate. when the max1909/max8725 are shut down, the dhi output is high . 24 src source connection for driver for pds/pdl switches. bypass src to power ground with a 1f capacitor. 25 cssn input current sense for charger (negative input) 26 cssp input current sense for charger (positive input). connect a current-sense resistor from cssp to cssn. 27 pds power-source pmos switch driver output. when the max1909/max8725 are powered down, the pds output is pulled to src through an internal 1m resistor. 28 pdl system-load pmos switch driver output. when the max1909/max8725 are powered down, the pdl output is pulled to ground through an internal 100k resistor. multichemistry battery chargers with automatic system power selector ______________________________________________________________________________________ 13
max1909/max8725 multichemistry battery chargers with automatic system power selector 14 ______________________________________________________________________________________ cssp cssn ldo dhi dlov dlo pgnd csip csin batt gnd dcin vctl ictl mode acin acok cls ccv cci ccs ref gnd to host system batt + temp batt - battery ac adapter r6 590k 1% r7 196k 1% c5 1 f d4 p3 rs1 0.01 r5 10k c11 0.1 f c10 0.01 f c9 0.01 f c12 1 f c4 22 f n1 p1 c16 1 f c13 1 f r13 33 c1 22 f gnd pgnd rs2 0.015 to system load r8 1m ldo output (input i limit: 7.5a) output voltage: 12.6v charge i limit: 3.0a pds pdl src ldo ref dhiv c17 0.1 f r4 100k src c22 1 f r9 10k p2 max1909 max8725 pkpres (max8725 only) l1 10 h ldo ldo 0.1 f 0.1 f figure 1. typical operating circuit demonstrating hardwired control
max1909/max8725 multichemistry battery chargers with automatic system power selector ______________________________________________________________________________________ 15 cssp cssn ldo dhi dlov dlo pgnd csip csin batt gnd dcin vctl ictl acin mode acok iinp ccv cci ccs ref av dd /ref scl sda gnd host batt + temp sda scl batt - smart battery ac adapter r6 590k 1% r7 196k 1% c5 1 f d4 p3 p4 rs1 0.01 r5 10k c11 0.1 f c10 0.01 f c9 0.01 f c12 1 f c4 22 f n1 p1 c16 1 f c13 1 f r13 33 c1 22 f gnd pgnd rs2 0.015 to system load r8 1m ldo outputs output input a/d input open-drain output voltage: 16.8v pds pdl src ldo cls ref dhiv c17 0.1 f src c15 1 f r21 10k p2 max1909 max8725 c14 0.1 f r9 10k r19, r20 10k (input i limit: 7.5a) l1 10 h d/a output 0.1 f 0.1 f ldo pkpres (max8725 only) figure 2. smart-battery charger circuit demonstrating operation with a host microcontroller
max1909/max8725 multichemistry battery chargers with automatic system power selector 16 ______________________________________________________________________________________ chg logic 5.4v linear regulator 4.2235v reference ldo dcin ref acok 2.048v iinp dc-dc converter pds dhi pdl driver driver driver driver dlov dlo pgnd lvc batt mode vctl csip csin level shifter level shifter cssp cssn ictl cls srdy gnd gnd gmv gmi gms ccs cci ccv cell select logic and battery voltage- divider acin 0.9 * ldo rdy src switch logic r r 9r ref mode dhiv dcin 0.8v gm batt pkpres 3.0v/cell batt_uv ictlok pack_on chg src max1909 max8725 src-10v 100k max1909 only max8725 only figure 3. functional diagram
max1909/max8725 multichemistry battery chargers with automatic system power selector ______________________________________________________________________________________ 17 detailed description the max1909/max8725 include all of the functions necessary to charge li+, nimh, and nicd batteries. a high-efficiency, synchronous-rectified step-down dc- dc converter is used to implement a precision con- stant-current, constant-voltage charger with input current limiting. the dc-dc converter uses external p-channel/n-channel mosfets as the buck switch and synchronous rectifier to convert the input voltage to the required charge current and voltage. the charge cur- rent and input current-limit sense amplifiers have low- input-referred offset errors and can use small-value sense resistors. the max1909/max8725 feature a volt- age-regulation loop (ccv) and two current-regulation loops (cci and ccs). the ccv voltage-regulation loop monitors batt to ensure that its voltage never exceeds the voltage set by vctl. the cci battery current-regu- lation loop monitors current delivered to batt to ensure that it never exceeds the current limit set by ictl. a third loop (ccs) takes control and reduces the charge current when the sum of the system load and the input- referred charge current exceeds the power source cur- rent limit set by cls. tying cls to the reference voltage provides a 7.5a input current limit with a 10m sense resistor. the ictl, vctl, and cls analog inputs set the charge current, charge voltage, and input current limit, respec- tively. for standard applications, internal set points for ictl and vctl provide a 3a charge current using a 15m sense resistor and a 4.2v per-cell charge volt- age. the variable for controlling the number of cells is set with the mode input. the max8725 includes a pkpres input used for battery-pack detection. based on the presence or absence of the ac adapter, the max1909/max8725 automatically provide an open- drain logic output signal acok and select the appropri- ate source for supplying power to the system. a p-channel load switch controlled from the pdl output and a similar p-channel source switch controlled from the pds output are used to implement this function. using the mode control input, the max1909/max8725 can be pro- grammed to perform a relearning, or conditioning, cycle in which the battery is isolated from the charger and com- pletely discharged through the system load. when the battery reaches 100% depth of discharge, it is recharged to full capacity. the circuit shown in figure 1 demonstrates a simple hardwired application, while figure 2 shows a typical application for smart-battery systems with variable charge current and source switch configuration that sup- ports battery conditioning. smart-battery systems typical- ly use a host ? to achieve this added functionality. setting the charge voltage the max1909/max8725 use a high-accuracy voltage regulator for charge voltage. the vctl input adjusts the battery output voltage. in default mode (vctl = ldo), the overall accuracy of the charge voltage is ?.5%. vctl is allowed to vary from 0 to 3.6v, which provides a 10% adjustment range of the battery volt- age. limiting the adjustment range reduces the sensi- tivity of the charge voltage to external resistor tolerances from ?% to ?.05%. the overall accuracy of the charge voltage is better than ?% when using ?% resistors to divide down the reference to establish vctl. the per-cell battery termination voltage is a func- tion of the battery chemistry and construction. consult the battery manufacturer to determine this voltage. the battery voltage is calculated by the equation: where v ref = 4.2235v, and cell is the number of cells selected with the max1909/max8725s?trilevel mode control input. when mode is tied to the ldo output, cell = 4. when mode is left floating, cell = 3. when mode is tied to ground, the charger enters condition- ing mode, which is used to isolate the battery from the charger and discharge it through the system load. see the conditioning mode section. the internal error ampli- fier (gmv) maintains voltage regulation (see figure 3 for the functional diagram ). the voltage-error amplifier is compensated at ccv. the component values shown in figures 1 and 2 provide suitable performance for most applications. individual compensation of the volt- age regulation and current-regulation loops allow for optimal compensation. see the compensation section. setting the charge current the voltage on the ictl input sets the maximum voltage across current-sense resistor rs2, which in turn determines the charge current. the full-scale differen- tial voltage between csip and csin is 75mv; thus, for a 0.015 sense resistor, the maximum charge current is 5a. in default mode (ictl = ldo), the sense voltage is 45mv with an overall accuracy of ?%. the charge cur- rent is programmed with ictl using the equation: i rs v v chg ictl = 0 075 236 . . v cell v vv batt ref vctl =+ ? ? ? ? ? ? ? ? ? ? ? ? ? 18 952 . .
max1909/max8725 multichemistry battery chargers with automatic system power selector 18 ______________________________________________________________________________________ the input range for ictl is 0 to 3.6v on the max1909, and 0 to 3.2v on the max8725. the charger shuts down if ictl is forced below 0.75v for the max1909 and 0.06v for the max8725. when choosing current-sense resistor rs2, note that it must have a sufficient power rating to handle the full-load current. the sense resistor? i 2 r power loss reduces charger efficiency. adjusting ictl to drop the voltage across the current-sense resistor improves efficiency, but may degrade accuracy due to the current-sense amplifier? input offset error. the charge-current error amplifier (gmi) is compensated at the cci pin. see the compensation section. conditioning charge the max1909 includes a battery voltage comparator that allows a conditioning charge of overdischarged li+ battery packs. if the battery-pack voltage is less than 3.1v x the number of cells programmed by cells, the max1909 charges the battery with 300ma current when using sense resistor rs2 = 0.015 . after the battery voltage exceeds the conditioning charge threshold, the max1909 resumes full-charge mode, charging to the programmed voltage and current limits. the max8725 does not provide automatic support for providing a conditioning charge. to configure the max8725 to provide a conditioning charge current, ictl should be directly driven. setting the input current limit the total input current, from a wall cube or other dc source, is the sum of the system supply current and the current required by the charger. the max1909/max8725 reduce the source current by decreasing the charge cur- rent when the input current exceeds the set input current limit. this technique does not truly limit the input current. as the system supply current rises, the available charge current drops proportionally to zero. thereafter, the total input current can increase without limit. an internal amplifier compares the differential voltage between cssp and cssn to a scaled voltage set with the cls input. v cls can be driven directly or set with a resistive voltage-divider between ref and gnd. connect cls to ref to set the input current-limit sense voltage to the maximum value of 75mv. calculate the input current as follows: v cls determines the reference voltage of the gms error amplifier. sense resistor rs1 sets the maximum allowable source current. once the input current limit is reached, the charge current is decreased linearly until the input current is below the desired threshold. duty cycle affects the accuracy of the input current limit. ac load current also affects accuracy (see the typical operating characteristics ). refer to the max1909/max8725 ev kit data sheet for more details on reducing the effects of switching noise. when choosing the current-sense resistor rs1, carefully calculate its power rating. take into account variations in the system? load current and the overall accuracy of the sense amplifier. note that the voltage drop across rs1 contributes additional power loss, which reduces efficiency. system currents normally fluctuate as portions of the system are powered up or put to sleep. without input current regulation, the input source must be able to deliver the maximum system current and the maximum charger input current. by using the input current-limit circuit, the output current capability of the ac wall adapter can be lowered, reducing system cost. current measurement the max1909/max8725 include an input current monitor iinp. the current delivered at the iinp output is a scaled- down replica of the system load current plus the input- referred charge current that is sensed across cssp and cssn inputs. the output voltage range is 0 to 3v. the voltage of iinp is proportional to the input current according to the following equation: v iinp = i source r s1 g iinp r 9 where i source is the dc current supplied by the ac adapter power, g iinp is the transconductance of iinp (3ma/v typ), and r9 is the resistor connected between iinp and ground. leave the iinp pin unconnected if not used. ldo regulator ldo provides a 5.4v supply derived from dcin and can deliver up to 10ma of extra load current. the low- side mosfet driver is powered by dlov, which must be connected to ldo as shown in figure 1. ldo also supplies the 4.2235v reference (ref) and most of the control circuitry. bypass ldo with a 1? capacitor. shutdown and charge inhibit ( pkpres ) when the ac adapter is removed, the max1909/ max8725 shut down to a low-power state that does not significantly load the battery. under these conditions, a maximum of 6? is drawn from the battery through the combined load of the src, cssp, cssn, csip, csin, and batt inputs. the charger enters this low-power state when dcin falls below the undervoltage-lockout (uvlo) threshold of 7v. the pds switch turns off, the pdl switch turns on, and the system runs from the battery. i rs v v in cls ref = 0 075 1 .
max1909/max8725 multichemistry battery chargers with automatic system power selector ______________________________________________________________________________________ 19 the body diode of the pdl switch prevents the voltage on the power source output from collapsing. charging can also be inhibited by driving ictl below 0.035v, which suspends switching and pulls cci, ccs, and ccv to ground. the pds and pdl drivers, ldo, input current monitor, and control logic (acok) all remain active in this state. approximately 3ma of sup- ply current is drawn from the ac adapter and 3? (max) is drawn from the battery to support these functions. in smart-battery systems, pkpres is usually driven from a voltage-divider formed with a low-value resistor or ptc thermistor inside the battery pack and a local resistive pullup. this arrangement automatically detects the pres- ence of a battery. the max8725 threshold voltage is 55% of v ldo , with hysteresis of 1% v ldo to prevent erratic transitions. ac adapter detection and power-source selection the max1909/max8725 include a hysteretic compara- tor that detects the presence of an ac power adapter and automatically delivers power to the system load from the appropriate available power source. when the adapter is present, the open-drain acok output becomes high impedance. the switch threshold at acin is 2.048v. use a resistive voltage-divider from the adapter? output to the acin pin to set the appropriate detection threshold. when charging, the battery is iso- lated from the system load with the p-channel pdl switch, which is biased off. when the adapter is absent, the drives to the switches change state in a fast break- before-make sequence. pdl begins to turn on 7.5? after pds begins to turn off. the threshold for selecting between the pdl and pds switches is set based on the voltage difference between the dcin and the batt pins. if this voltage difference drops below 100mv, the pds is switched off and pdl is switched on. under these conditions, the max1909/max8725 are completely powered down. the pdl switch is kept on with a 100k pulldown resis- tor when the charger is powered down through ictl or pkpres , or when the ac adapter is removed. the drivers for pdl and pds are fully integrated. the pos- itive bias inputs for the drivers connect to the src pin and the negative bias inputs connect to a negative regulator referenced to src. with this arrangement, the drivers can swing from src to approximately 10v below src. conditioning mode the max1909/max8725 can be programmed to per- form a conditioning cycle to calibrate the battery? fuel gauge. this cycle consists of isolating the battery from the charger and discharging it through the system load. when the battery reaches 100% depth of discharge, it is then recharged. driving the mode pin low places the max1909/max8725 in conditioning mode, which stops the charger from switching, turns the pds switch off, and turns the pdl switch on. to utilize the conditioning mode function, the configura- tion of the pds switch must be changed to two source- connected fets to prevent the ac adapter from sup- plying current to the system through the mosfet? body diode. see figure 2. the src pin must be con- nected to the common source node of the back-to-back fets to properly drive the mosfets. it is essential to alert the user that the system is performing a conditioning cycle. if the user termi- nates the cycle prematurely, the battery can be dis- charged even though the system was running off the ac adapter for a substantial period of time. if the ac adapter is in fact removed during conditioning, the max1909/max8725 keep the pdl switch on and the charger remains off as it would in normal operation. in the max8725, if the battery is removed during condi- tioning mode, the pkpres control overrides condition- ing mode. when mode is grounded and pkpres goes high, the pds switch starts turning on within 7.5? and the system is powered from the ac adapter. in the max1909, disable conditioning mode before the battery is overdischarged or removed. dc-dc converter the max1909/max8725 employ a buck regulator with a pmos high-side switch and a low-side nmos synchro- nous rectifier. the max1909/max8725 feature a pseu- do-fixed-frequency, cycle-by-cycle current-mode control scheme. the off-time is dependent upon v dcin , v batt , and a time constant, with a minimum t off of 300ns. the max1909/max8725 can also operate in discontinuous conduction for improved light-load effi- ciency. the operation of the dc-dc controller is deter- mined by the following four comparators as shown in figure 4: ccmp: compares the control point (lowest voltage clamp (lvc)) against the charge current (csi). the high-side mosfet on-time is terminated if the ccmp output is high.
max1909/max8725 multichemistry battery chargers with automatic system power selector 20 ______________________________________________________________________________________ comp imax imin zcmp css 20x dhi dlo gms gmi lvc csi 20x gmv cls ictl vctl 1.94v 0.15v 0.1v lvc ac adapter cssp cssn r s q q dhi dlo csip csin batt ccs cci ccv toff r ccv ccv cci ccs c out max1909 max8725 figure 4. dc-dc converter functional diagram
max1909/max8725 multichemistry battery chargers with automatic system power selector ______________________________________________________________________________________ 21 imin: compares the control point (lvc) against 0.15v (typ). if imin output is low, then a new cycle cannot begin. this comparator determines whether the regulator operates in discontinuous mode. imax: compares the charge current (csi) to the internally fixed cycle-by-cycle current limit. the current-sense voltage limit is 97mv. with rs2 = 0.015 , this corresponds to 6a. the high-side mosfet on-time is terminated if the imax output is high and a new cycle cannot begin until imax goes low. imax protects against sudden overcurrent faults. zcmp: compares the charge current (csi) to 333ma (rs2 = 0.015 ). the current-sense voltage threshold is 5mv. if zcmp output is high, then both mosfets are turned off. the zcmp comparator terminates the switch on-time in discontinuous mode. ccv, cci, ccs, and lvc control blocks the max1909/max8725 control charge voltage (ccv control loop), charge current (cci control loop), or input current (ccs control loop), depending on the operating conditions. the three control loops, ccv, cci, and ccs, are brought together internally at the lvc amplifier. the output of the lvc amplifier is the feedback control signal for the dc-dc controller. the minimum voltage at ccv, cci, or ccs appears at the output of the lvc amplifier and clamps the other two control loops to within 0.3v above the control point. clamping the other two control loops close to the lowest control loop ensures fast transition with minimal overshoot when switching between different control loops (see the compensation section). continuous conduction mode with sufficient battery current loading, the max1909/ max8725s?inductor current never reaches zero, which is defined as continuous conduction mode. if the batt voltage is within the following range: 3.1v (number of cells) < v batt < (0.88 v dcin ) the regulator is not in dropout and switches at f nom = 400khz. the controller starts a new cycle by turning on the high-side p-channel mosfet and turning off the low-side n-channel mosfet. when the charge current is greater than the control point (lvc), ccmp goes high and the off-time is started. the off-time turns off the high-side p-channel mosfet and turns on the low-side n-channel mosfet. the operating frequency is gov- erned by the off-time and is dependent upon v dcin and v batt . the off-time is set by the following equation: where f nom = 400khz: these equations describe the controller? pseudo-fixed- frequency performance over the most common operat- ing conditions. at the end of the fixed off-time, the controller can initiate a new cycle if the control point (lvc) is greater than 0.15v (imin = high) and the peak charge current is less than the cycle-by-cycle limit (imax = low). if the charge current exceeds i max , the on-time is terminated by the imax comparator. if during the off-time the inductor current goes to zero, zcmp = high, both the high- and low-side mosfets are turned off until another cycle is ready to begin. this condition is discontinuous conduction. see the discontinuous conduction section. there is a minimum 0.3? off-time when the (v dcin - v batt ) differential becomes too small. if v batt 0.88 x v dcin , then the threshold for minimum off-time is reached and the t off is fixed at 0.3?. the switching frequency in this mode varies according to the equation: discontinuous conduction the max1909/max8725 enter discontinuous-conduc- tion mode when the output of the lvc control point falls below 0.15v. for rs2 = 0.015 , this corresponds to 0.5a: i v rs a min = = 015 20 2 05 . . f t v vv off batt cssn batt = ? + ? ? ? ? ? ? 1 1 f tt on off = + 1 where i vt l ripple batt off = t li vv on ripple cssn batt = ? t f vv v off nom cssn batt cssn = ? 1
max1909/max8725 multichemistry battery chargers with automatic system power selector 22 ______________________________________________________________________________________ in discontinuous mode, a new cycle is not started until the lvc voltage rises above 0.15v. discontinuous- mode operation can occur during conditioning charge of overdischarged battery packs, when the charge cur- rent has been reduced sufficiently by the ccs control loop, or when the charger is in constant voltage mode with a nearly full battery pack. compensation the charge voltage, charge current, and input current- limit regulation loops are compensated separately and independently at the ccv, cci, and ccs pins. ccv loop compensation the simplified schematic in figure 5 is sufficient to describe the operation of the max1909/max8725 when the voltage loop (ccv) is in control. the required com- pensation network is a pole-zero pair formed with c cv and r cv . the pole is necessary to roll off the voltage loop? response at low frequency. the zero is necessary to compensate the pole formed by the output capacitor and the load. r esr is the equivalent series resistance (esr) of the charger output capacitor (c out ). r l is the equivalent charger output load, where r l = v batt / i chg . the equivalent output impedance of the gmv amplifier, r ogmv , is greater than 10m . the voltage loop transconductance (gmv = i ccv / v batt ) depends on the mode input, which determines the number of cells. gmv = 0.125ma/mv for 4 cells and gmv = 0.167ma/mv for 3 cells. the dc-dc converter transcon- ductance is dependent upon the charge current-sense resistor rs2: where a csi = 20, and rs2 = 0.015 in the typical operating circuits (figures 1 and 2), so gm out = 3.33a/v. the loop transfer function is: ltf gm rscr sc r r sc r gscr out ogmv cv cv cv ogmv l out l mv out esr = + () + () + () + () 1 1 1 1 gm ars out csi = 1 2 c cv c out r cv r l r esr r ogmv ccv batt gmv ref gm out figure 5. ccv loop diagram no. name calculation description 1 ccv pole lowest frequency pole created by c cv and gmv? finite output resistance. since r ogmv is very large and not well controlled, the exact value for the pole frequency is also not well controlled (r ogmv > 10m ). 2 ccv zero voltage-loop compensation zero. if this zero is at the same frequency or lower than the output pole f p_out , then the loop transfer function approximates a single pole response near the crossover frequency. choose c cv to place this zero at least one decade below crossover to ensure adequate phase margin. 3 output pole output pole formed with the effective load resistance r l and the output capacitance c out . r l influences the dc gain but does not affect the stability of the system or the crossover frequency. 4 output zero output esr zero. this zero can keep the loop from crossing unity gain if f z_out is less than the desired crossover frequency; therefore, choose a capacitor with an esr zero greater than the crossover frequency. table 1. poles and zeros of the voltage-loop transfer function f rc pcv ogmv cv _ = 1 2 _ = 1 2 _ = 1 2 _ = 1 2
max1909/max8725 multichemistry battery chargers with automatic system power selector ______________________________________________________________________________________ 23 the poles and zeros of the voltage-loop transfer function are listed from lowest frequency to highest frequency in table 1. near crossover, c cv has a much lower impedance than r ogmv . since c cv is in parallel with r ogmv, c cv dominates the parallel impedance near crossover. additionally, r cv has a much higher impedance than c cv and dominates the series combination of r cv and c cv , so: c out also has a much lower impedance than r l near crossover, so the parallel impedance is mostly capaci- tive and: if r esr is small enough, its associated output zero has a negligible effect near crossover and the loop-transfer function can be simplified as follows: setting the ltf = 1 to solve for the unity-gain frequency yields: for stability, choose a crossover frequency lower than 1/10th of the switching frequency. choosing a crossover frequency of 30khz and solving for r cv using the component values listed in figure 1 yields: mode = v cc (4 cells) gmv = 0.125?/mv c out = 22? v batt = 16.8v r l = 0.2 gm out = 3.33a/v f co_cv = 30khz f osc = 400khz to ensure that the compensation zero adequately can- cels the output pole, select f z_cv f p_out : c cv (r l /r cv ) c out where c cv 4nf (assuming 4 cells and 4a maximum charge current). figure 6 shows the bode plot of the voltage-loop fre- quency response using the values calculated above. cci loop compensation the simplified schematic in figure 7 is sufficient to describe the operation of the max1909/max8725 when the battery current loop (cci) is in control. since the output capacitor? impedance has little effect on the response of the current loop, only a single pole is required to compensate this loop. a csi is the internal gain of the current-sense amplifier. rs2 is the charge current-sense resistor, rs2 = 15m . r ogmi is the equivalent output impedance of the gmi amplifier, which is greater than 10m . gmi is the charge-current amplifier transconductance = 1?/mv. gm out is the dc-dc converter transconductance = 3.3a/v. the loop transfer function is given by: ltf gm a rs gmi r sr c out csi ogmi ogmi ci = + 2 1 r cf gmv gm k cv out co cv out = = 2 10 _ f co cv gm gmv r c out cv out _ = ? ? ? ? ? ? 2 ltf gm r sc gmv out cv out = r sc r sc l out l out 1 1 + () ? rscr sc r r ogmv cv cv cv ogmv cv + () + () ? 1 1 frequency (hz) magnitude (db) phase (degrees) 100k 10k 1k 100 10 1 -20 0 20 40 60 80 -40 -90 -45 0 -135 0.1 1m mag phase figure 6. ccv loop response
max1909/max8725 multichemistry battery chargers with automatic system power selector 24 ______________________________________________________________________________________ this describes a single-pole system. since: the loop transfer function simplifies to: the crossover frequency is given by: for stability, choose a crossover frequency lower than 1/10th of the switching frequency: c ci = gmi / (2 f o_ci ) choosing a crossover frequency of 30khz and using the component values listed in figure 1 yields c ci > 5.4nf. values for c ci greater than 10 times the minimum value may slow down the current-loop response excessively. figure 8 shows the bode plot of the current-loop fre- quency response using the values calculated above. ccs loop compensation the simplified schematic in figure 9 is sufficient to describe the operation of the max1909/max8725 when the input current-limit loop (ccs) is in control. since the output capacitor? impedance has little effect on the response of the input current-limit loop, only a single pole is required to compensate this loop. a css is the internal gain of the current-sense amplifier. rs1 is the input current-sense resistor; rs1 = 10m in the typical operating circuits. r ogms is the equivalent output impedance of the gms amplifier, which is greater than 10m . gms is the input current amplifier transconduc- tance = 1?/mv. gm in is the dc-dc converter? input- referred transconductance = (1/d) gm out = (1/d) 3.3a/v. f gmi c co ci ci _ = 2 ltf gmi r sr c ogmi ogmi ci = + 1 gm ars out csi = 1 2 frequency (hz) magnitude (db) 100k 1k 10 -20 0 20 40 60 100 80 -40 -45 0 -90 0.1 mag phase figure 8. cci loop response c cs r ogms gms css cls ccs cssp rs1 cssn gm in system load adapter input figure 9. ccs loop diagram c ci r ogmi cci gmi csi ictl gm out csip rs2 csin figure 7. cci loop diagram
max1909/max8725 multichemistry battery chargers with automatic system power selector ______________________________________________________________________________________ 25 the loop transfer function is given by: since: the loop transfer function simplifies to: the crossover frequency is given by: for stability, choose a crossover frequency lower than 1/10th the switching frequency: c cs = gms / (2 f co_cs ) choosing a crossover frequency of 30khz and using the component values listed in figure 1 yields c cs > 5.4nf. values for c cs greater than 10 times the mini- mum value may slow down the input current-loop response excessively. figure 10 shows the bode plot of the input current-limit loop frequency response using the values calculated above. mosfet drivers the dhi and dlo outputs are optimized for driving moderately-sized power mosfets. the mosfet drive capability is the same for both the low-side and high- side switches. this is consistent with the variable duty factor that occurs in the notebook computer environ- ment where the battery voltage changes over a wide range. an adaptive dead-time circuit monitors the dlo output and prevents the high-side fet from turning on until dlo is fully off. there must be a low-resistance, low-inductance path from the dlo driver to the mosfet gate for the adaptive dead-time circuit to work properly. otherwise, the sense circuitry in the max1909/max8725 interpret the mosfet gate as ?ff while there is still charge left on the gate. use very short, wide traces measuring 10 squares to 20 squares or less (1.25mm to 2.5mm wide if the mosfet is 25mm from the device). unlike the dlo output, the dhi output uses a fixed-delay 50ns time to prevent the low-side fet from turning on until dhi is fully off. the same lay- out considerations should be used for routing the dhi signal to the high-side fet. since the transition time for a p-channel switch can be much longer than an n-channel switch, the dead time prior to the high-side pmos turning on is more pro- nounced than in other synchronous step-down regula- tors, which use high-side n-channel switches. on the high-to-low transition, the voltage on the inductor? ?witched?terminal flies below ground until the low-side switch turns on. a similar dead-time spike occurs on the opposite low-to-high transition. depending upon the magnitude of the load current, these spikes usually have a minor impact on efficiency. the high-side driver (dhi) swings from src to 5v below src and typically sources 0.9a and sinks 0.5a from the gate of the p-channel fet. the internal pull- high transistors that drive dhi high are robust, with a 2.0 (typ) on-resistance. the low-side driver (dlo) swings from dlov to ground and typically sources 0.5a and sinks 0.9a from the gate of the n-channel fet. the internal pulldown transistors that drive dlo low are robust, with a 1.0 (typ) on- resistance. this helps prevent dlo from being pulled up when the high-side switch turns on, due to capaci- tive coupling from the drain to the gate of the low-side mosfet. this places some restrictions on the fets that can be used. using a low-side fet with smaller gate-to-drain capacitance can prevent these problems. f gms c co cs cs _ = 2 ltf gms r sr c ogms ogms cs = + 1 gm ars in css = 1 1 ltf gm a rs gms r sr c in css ogms ogms cs = + 1 1 frequency (hz) magnitude (db) 100k 10m 1k 10 -20 0 20 40 60 100 80 -40 -45 0 -90 0.1 mag phase phase (degrees) figure 10. ccs loop response
max1909/max8725 multichemistry battery chargers with automatic system power selector 26 ______________________________________________________________________________________ design procedure table 2 lists the recommended components and refers to the circuit of figure 2. the following sections describe how to select these components. mosfet selection mosfets p2 and p3 (figure 1) provide power to the system load when the ac adapter is inserted. these devices may have modest switching speeds, but must be able to deliver the maximum input current as set by rs1. as always, care should be taken not to exceed the device? maximum voltage ratings or the maximum operating temperature. the p-channel/n-channel mosfets (p1, n1) are the switching devices for the buck controller. the guidelines for these devices focus on the challenge of obtaining high load-current capability when using high-voltage (>20v) ac adapters. low-current applications usually require less attention. the high-side mosfet (p1) must be able to dissipate the resistive losses plus the switching losses at both v dcin(min) and v dcin(max) . ideally, the losses at v dcin(min) should be roughly equal to losses at v dcin(max) , with lower losses in between. if the losses at v dcin(min) are significantly higher than the losses at v dcin(max) , consider increasing the size of p1. conversely, if the losses at v dcin(max) are significantly higher than the losses at v dcin(min), consider reducing the size of p1. if dcin does not vary over a wide range, the minimum power dissipation occurs where the resistive losses equal the switching losses. reference qty description c1, c4 2 22? 20%, 35v e-size low-esr tantalum capacitors avx tpse226m035r0300 kemet t495x226m035as c5, c15 2 1? 10%, 25v, x7r ceramic capacitors (1206) murata grm31mr71e105k taiyo yuden tmk316bj105kl tdk c3216x7r1e105k c9, c10 2 0.01? 10%, 25v, x7r ceramic capacitors (0402) murata grp155r71e103k tdk c1005x7r1e103k c11, c14, c17 3 0.1? 10%, 25v, x7r ceramic capacitors (0603) murata grm188r71e104k tdk c1608x7r1e104k c12, c13, c16 3 1? 10%, 6.3v, x5r ceramic capacitors (0603) murata grm188r60j105k taiyo yuden jmk107bj105ka tdk c1608x5r1a105k d4 1 schottky diode, 0.5a, 30v sod-123 diodes inc. b0530w general semiconductor mbr0530 on semiconductor mbr0530 d5 1 25v ?% zener diode cmdz5253b l1 1 10?, 4.4a inductor sumida cdrh104r-100nc toko 919as-100m table 2. recommended components reference qty description n1/p1 1 dual n- and p-channel mosfets, 7a, 30v and -5a, -30v, 8-pin so, mosfet fairchild fds8958a or single n-channel mosfets, +13.5a, +30v fds6670s and single p-channel mosfets, -13.5a, -30v fds66709z p2, p3, p4 3 single, p-channel, -11a, -30v, 8-pin so mosfets fairchild fds6675 r4 1 100k , 5% resistor (0603) r5, r9, r21 2 10k 1% resistors (0603) r6 1 590k 1% resistor (0603) r7 1 196k 1% resistor (0603) r8 1 1m 5% resistor (0603) r11 1 1k 5% resistor (0603) r16 1 33 5% resistor (0603) r19, r20 2 10k 5% resistors (0603) rs1 1 0.01 1%, 0.5w sense resistor (2010) vishay dale wsl2010 0.010 1.0% irc lrc-lr2010-01-r010-f rs2 1 0.015 1%, 0.5w sense resistor (2010) vishay dale wsl2010 0.015 1.0% irc lrc-lr2010-01-r015-f u1 1 max1909eti/max8725eti (28-pin thin qfn-ep)
max1909/max8725 multichemistry battery chargers with automatic system power selector ______________________________________________________________________________________ 27 choose a low-side mosfet that has the lowest possi- ble on-resistance (r ds(on) ), comes in a moderate- sized package, and is reasonably priced. make sure that the dlo gate driver can supply sufficient current to support the gate charge and the current injected into the parasitic gate-to-drain capacitor caused by the high-side mosfet turning on; otherwise, cross-con- duction problems can occur. the max1909/max8725 have an adaptive dead-time cir- cuit that prevents the high-side and low-side mosfets from conducting at the same time (see the mosfet drivers section). even with this protection, it is still possi- ble for delays internal to the mosfet to prevent one mosfet from turning off when the other is turned on. select devices that have low turn-off times. to be conservative, make sure that p1(t doff(max) ) - n1(t don(min) ) < 40ns. failure to do so may result in efficiency-killing shoot-through currents. if delay mis- match causes shoot-through currents, consider adding extra capacitance from gate to source on n1 to slow down its turn-on time. mosfet power dissipation worst-case conduction losses occur at the duty factor extremes. for the high-side mosfet, the worst-case power dissipation (pd) due to resistance occurs at the minimum supply voltage: generally, a small high-side mosfet is desired to reduce switching losses at high input voltages. however, the r ds(on) required to stay within package power-dissipation limits often limits how small the mosfet can be. the optimum occurs when the switch- ing (ac) losses equal the conduction (i 2 r ds(on) ) losses. high-side switching losses do not usually become an issue until the input is greater than approxi- mately 15v. switching losses in the high-side mosfet can become an insidious heat problem when maximum ac adapter voltages are applied, due to the squared term in the cv 2 f switching-loss equation. if the high- side mosfet that was chosen for adequate r ds(on) at low supply voltages becomes extraordinarily hot when subjected to v dcin(max), then choose a mosfet with lower losses. calculating the power dissipation in p1 due to switching losses is difficult since it must allow for difficult quantifying factors that influence the turn-on and turn-off times. these factors include the internal gate resistance, gate charge, threshold voltage, source inductance, and pc board layout characteristics. the following switching-loss calculation provides only a very rough estimate and is no substitute for breadboard evaluation, preferably including a verification using a thermocouple mounted on p1: where c rss is the reverse transfer capacitance of p1, and i gate is the peak gate-drive source/sink current. for the low-side mosfet (n1), the worst-case power dissipation always occurs at maximum input voltage: choose a schottky diode (d1, figure 2) with a forward voltage low enough to prevent the n1 mosfet body diode from turning on during the dead time. as a gen- eral rule, a diode with a dc current rating equal to 1/3rd the load current is sufficient. this diode is optional and can be removed if efficiency is not critical. inductor selection the charge current, ripple, and operating frequency (off-time) determine the inductor characteristics. inductor l1 must have a saturation current rating of at least the maximum charge current plus 1/2 of the ripple current ( il): i sat = i chg + (1/2) il pd n v v i r batt dcin load ds on () () 11 2 2 = ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? pd p switching vcfi i dcin max rss sw load gate (_ ) () 1 2 2 = pd p v v i r batt dcin load ds on () () 1 2 2 = ? ? ? ? ? ? ? ? ? ? ? ? 0 1.0 0.5 1.5 8 10111213 9 1415161718 v batt (v) ripple current (a) v dcin = 19v vctl = ictl = ldo 3 cells 4 cells figure 11. ripple current vs. battery voltage (max1909)
max1909/max8725 multichemistry battery chargers with automatic system power selector 28 ______________________________________________________________________________________ the ripple current is determined by: il = v batt t off / l where: t off = 2.5? (v dcin - v batt ) / v dcin for v batt < 0.88 v dcin or: t off = 0.3? for v batt > 0.88 v dcin figure 11 illustrates the variation of the ripple current vs. battery voltage when the circuit is charging at 3a with a fixed input voltage of 19v. higher inductor values decrease the ripple current. smaller inductor values require high-saturation current capabilities and degrade efficiency. designs that set lir = il / i chg = 0.3 usually result in a good balance between inductor size and efficiency. input-capacitor selection the input capacitor must meet the ripple current requirement (i rms ) imposed by the switching currents. nontantalum chemistries (ceramic, aluminum, or os- con) are preferred due to their resilience to power-up surge currents. the input capacitors should be sized so that the temperature rise due to ripple current in continuous conduction does not exceed approximately 10?. the maximum ripple current occurs at 50% duty factor or v dcin = 2 v batt , which equates to 0.5 i chg . if the application of interest does not achieve the maximum value, size the input capacitors according to the worst-case conditions. output-capacitor selection the output capacitor absorbs the inductor ripple cur- rent and must tolerate the surge current delivered from the battery when it is initially plugged into the charger. as such, both capacitance and esr are important parameters in specifying the output capacitor as a filter and to ensure the stability of the dc-dc converter (see the compensation section). beyond the stability requirements, it is often sufficient to make sure that the output capacitor? esr is much lower than the battery? esr. either tantalum or ceramic capacitors can be used on the output. ceramic devices are preferable because of their good voltage ratings and resilience to surge currents. applications information startup conditioning charge for overdischarged cells it is desirable to charge deeply discharged li+ batter- ies at a low rate to improve cycle life. the max1909/max8725 automatically reduces the charge current when the voltage per cell is below 3.1v. the charge current-sense voltage is set to 4.5mv (i chg = 300ma with rs2 = 15m ) until the battery voltage rises above the threshold. there is approximately 300mv for 3 cell, 400mv for 4 cell of hysteresis to prevent the charge-current magnitude from chattering between the two values. for the max8725, control the ictl voltage to set a con- ditioning charge rate. layout and bypassing bypass dcin with a 1? capacitor to ground (figure 1). d4 protects the max1909/max8725 when the dc power source input is reversed. a signal diode for d4 is adequate because dcin only powers the ldo and the internal reference. bypass ldo, dhiv, dlov, and other pins as shown in figure 1. good pc board layout is required to achieve specified noise, efficiency, and stable performance. the pc board layout artist must be given explicit instructions preferably, a sketch showing the placement of the power-switching components and high-current routing. refer to the pc board layout in the max1909/max8725 evaluation kit for examples. a ground plane is essential for optimum performance. in most applications, the cir- cuit is located on a multilayer board, and full use of the four or more copper layers is recommended. use the top layer for high-current connections, the bottom layer for quiet connections, and the inner layers for an unin- terrupted ground plane. use the following step-by-step guide: 1) place the high-power connections first, with their grounds adjacent: a) minimize the current-sense resistor trace lengths, and ensure accurate current sensing with kelvin connections. b) minimize ground trace lengths in the high-current paths. c) minimize other trace lengths in the high-current paths. d) use >5mm wide traces. ii vv v v rms chg batt dcin batt dcin = ? ? ? ? ? ? ? ? ? ()
max1909/max8725 multichemistry battery chargers with automatic system power selector ______________________________________________________________________________________ 29 e) connect c1 and c2 to the high-side mosfet (10mm max length). return these capacitors to the power ground plane. f) minimize the lx node (mosfets, rectifier cath- ode, inductor (15mm max length)). ideally, surface-mount power components are flush against one another with their ground terminals almost touching. these high-current grounds are then connected to each other with a wide, filled zone of top-layer copper, so they do not go through vias. the resulting top-layer ground plane is connected to the normal inner-layer ground plane at the out- put ground terminals, which ensures that the ic? analog ground is sensing at the supply? output terminals without interference from ir drops and ground noise. other high-current paths should also be minimized, but focusing primarily on short ground and current-sense connections eliminates about 90% of all pc board layout problems. 2) place the ic and signal components. keep the main switching node (lx node) away from sensitive ana- log components (current-sense traces and ref capacitor). important: the ic should be less than 10mm from the current-sense resistors. quiet connections to ref, vctl, ictl, ccv, cci, ccs, iinp, acin, and dcin should be returned to a separate ground (gnd) island. the appropriate traces are marked on the schematic with the ground symbol ( ). there is very little current flow- ing in these traces, so the ground island need not be very large. when placed on an inner layer, a siz- able ground island can help simplify the layout because the low-current connections can be made through vias. the ground pad on the backside of the package should also be connected to this quiet ground island. 3) keep the gate drive traces (dhi and dlo) as short as possible (l < 20mm), and route them away from the current-sense lines and ref. these traces should also be relatively wide (w > 1.25mm). 4) place ceramic bypass capacitors close to the ic. the bulk capacitors can be placed further away. 5) use a single-point star ground placed directly below the part at the pgnd pin. connect the power ground (ground plane) and the quiet ground island at this location. see figure 12. chip information transistor count: 2720 process: bicmos inductor c in c out c out input output kelvin-sense vias under the sense resistor (refer to evaluation kit) gnd pgnd power path quiet ground island figure 12. pc board layout examples
max1909/max8725 multichemistry battery chargers with automatic system power selector maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 30 ____________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 2004 maxim integrated products printed usa is a registered trademark of maxim integrated products. package information (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation, go to www.maxim-ic.com/packages .) package information (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation, go to www.maxim-ic.com/packages .) package information (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation, go to www.maxim-ic.com/packages .) qfn thin.eps

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